You can also find my articles on my Google Scholar profile.
Published in , 2017
This thesis presents methods and tools necessary to develop user experience driven techniques to dynamically control cpu voltage and frequency. It describes how those methods can be used to improve energy efficiency on mobile devices whilst keeping the quality of experience high for end users.
Recommended citation: Volker Seeker. User Experience Driven CPU Frequency Scaling On Mobile Devices Towards Better Energy Efficiency. Ph.D. Thesis, School of Informatics, University of Edinburgh, 2017.
Published in IISWC, 2014
This paper introduces a novel methodology to automatically quantify user perceived system response times of interactive mobile workloads.
Recommended citation: Volker Seeker, Pavlos Petoumenos, Hugh Leather and Björn Franke. "Measuring QoE of Interactive Workloads and Characterising Frequency Governors on Mobile Devices." In Proceedings of the 2014 IEEE International Symposium on Workload Characterization, Raleigh, North Carolina, USA, October 2014.
Published in IJPP, 2012
Conference extension of the 2011 SAMOS paper on multi-core system simulation using just-in-time dynamic binary translation.
Recommended citation: Oscar Almer, Igor Böhm, Tobias J.K. Edler von Koch, Björn Franke, Stephen Kyle, Volker Seeker, Christopher Thompson, and Nigel Topham. "A Parallel Dynamic Binary Translator for Efficient Multi-Core Simulation." Published in the International Journal of Parallel Programming.
Published in IC-SAMOS, 2011
In this paper we develop a fast and scalable simulation methodology for multi-core platforms based on parallel and just-in-time dynamic binary translation.
Recommended citation: Oscar Almer, Igor Böhm, Tobias J.K. Edler von Koch, Björn Franke, Stephen Kyle, Volker Seeker, Christopher Thompson, and Nigel Topham. "Scalable Multi-Core Simulation Using Parallel Dynamic Binary Translation." Proceedings of the 11th International Conference on Embedded Computer Systems: Architectures, Modelling, and Simulation, Samos, Greece, July 2011.
Published in , 2011
This thesis develops the concepts required for efficient multi-core just-in-time dynamic binary translation and demonstrates its feasibility and high simulation performance through an implementation in the ARCSIM simulator platform.
Recommended citation: Volker Seeker. Design and Implementation of an Efficient Instruction Set Simulator for an Embedded Multi-Core Architecture. Diploma Thesis. Programmierung Eingebetteter Systeme, Technische Universität Berlin, 2011.