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A list of all the posts and pages found on the site. For you robots out there is an XML version available for digesting as well.

Pages

Posts

Teaching Support Needed

2 minute read

Published:

The new year is starting soon and many courses, including my own are still in need of teaching support. I need tutors, demonstrators and markers.

Programming Club Web Launch

less than 1 minute read

Published:

The University of Edinburgh Programming Club now has its own web page. Join us for the first session this Friday the 22nd of September in Appleton Tower, Room 6.06.

New Page Launched

less than 1 minute read

Published:

With me starting as University Teacher in Edinburgh, I believe it is time to have an actual academic page. So here it is …

publications

Design and Implementation of an Efficient Instruction Set Simulator for an Embedded Multi-Core Architecture

Published in , 2011

This thesis develops the concepts required for efficient multi-core just-in-time dynamic binary translation and demonstrates its feasibility and high simulation performance through an implementation in the ARCSIM simulator platform.

Recommended citation: Volker Seeker. Design and Implementation of an Efficient Instruction Set Simulator for an Embedded Multi-Core Architecture. Diploma Thesis. Programmierung Eingebetteter Systeme, Technische Universität Berlin, 2011.

Scalable Multi-Core Simulation Using Parallel Dynamic Binary Translation

Published in IC-SAMOS, 2011

In this paper we develop a fast and scalable simulation methodology for multi-core platforms based on parallel and just-in-time dynamic binary translation.

Recommended citation: Oscar Almer, Igor Böhm, Tobias J.K. Edler von Koch, Björn Franke, Stephen Kyle, Volker Seeker, Christopher Thompson, and Nigel Topham. "Scalable Multi-Core Simulation Using Parallel Dynamic Binary Translation." Proceedings of the 11th International Conference on Embedded Computer Systems: Architectures, Modelling, and Simulation, Samos, Greece, July 2011.

Parallel Dynamic Binary Translator for Efficient Multi-Core Simulation

Published in IJPP, 2012

Conference extension of the 2011 SAMOS paper on multi-core system simulation using just-in-time dynamic binary translation.

Recommended citation: Oscar Almer, Igor Böhm, Tobias J.K. Edler von Koch, Björn Franke, Stephen Kyle, Volker Seeker, Christopher Thompson, and Nigel Topham. "A Parallel Dynamic Binary Translator for Efficient Multi-Core Simulation." Published in the International Journal of Parallel Programming.

[Best Paper] Measuring QoE of Interactive Workloads and Characterising Frequency Governors on Mobile Devices

Published in IISWC, 2014

This paper introduces a novel methodology to automatically quantify user perceived system response times of interactive mobile workloads.

Recommended citation: Volker Seeker, Pavlos Petoumenos, Hugh Leather and Björn Franke. "Measuring QoE of Interactive Workloads and Characterising Frequency Governors on Mobile Devices." In Proceedings of the 2014 IEEE International Symposium on Workload Characterization, Raleigh, North Carolina, USA, October 2014.

User Experience Driven CPU Frequency Scaling On Mobile Devices Towards Better Energy Efficiency

Published in , 2017

This thesis presents methods and tools necessary to develop user experience driven techniques to dynamically control cpu voltage and frequency. It describes how those methods can be used to improve energy efficiency on mobile devices whilst keeping the quality of experience high for end users.

Recommended citation: Volker Seeker. User Experience Driven CPU Frequency Scaling On Mobile Devices Towards Better Energy Efficiency. Ph.D. Thesis, School of Informatics, University of Edinburgh, 2017.

Device-Hopping: Transparent Mid-Kernel Runtime Switching for Heterogeneous Systems

Published in TACO, 2021

This paper presents a study to make CPU + GPU systems more flexible with respect to switching between cores in the middle of kernel execution.

Recommended citation: Metzger, P, Seeker, V, Fensch, C & Cole, M 2021, Device-Hopping: Transparent Mid-Kernel Runtime Switching for Heterogeneous Systems, ACM Transactions on Architecture and Code Optimization.

Large Language Models for Compiler Optimization

Published in arXiv, 2023

We explore the novel application of Large Language Models to code optimization.

Recommended citation: Cummins, Chris, Volker Seeker, Dejan Grubisic, Mostafa Elhoushi, Youwei Liang, Baptiste Roziere, Jonas Gehring, et al. “Large Language Models for Compiler Optimization.” arXiv, September 11, 2023. https://doi.org/10.48550/arXiv.2309.07062.

[Best Paper] Revealing Compiler Heuristics through Automated Discovery and Optimization

Published in CGO, 2024

We present Heureka, a tool to automatically discover heuristic functions in compiler source code.

Recommended citation: V. Seeker, C. Cummins, M. Cole, B. Franke, K. Hazelwood and H. Leather, "Revealing Compiler Heuristics Through Automated Discovery and Optimization," 2024 IEEE/ACM International Symposium on Code Generation and Optimization (CGO), Edinburgh, United Kingdom, 2024, pp. 55-66, doi: 10.1109/CGO57630.2024.10444847.

talks

teaching

Extreme Computing

Honours course, Co-Lecturer, University of Edinburgh, School of Informatics

Programming Club

Undergraduate Peer-Learning Activity, Co-Organiser, University of Edinburgh, School of Informatics